Case Study: TEWS Technologies achieves reduced development time and manufacturing costs for complex high‑speed PCBs with Zuken's CADSTAR Power Integrity Advance

TEWS significantly reduces development time and cost of complex high-speed PCBs using concurrent power integrity simulation

TEWS Technologies (TEWS), a provider of turnkey embedded interface modules, faced escalating power‑integrity challenges on FPGA‑based boards—multiple voltage rails, dozens of power distribution networks (PDNs) and strict impedance and decoupling requirements threatened design timelines and first‑pass success. Already a long‑time user of Zuken’s CADSTAR, TEWS added Zuken’s CADSTAR Power Integrity Advance module to its high‑speed design flow to address these issues.

Zuken delivered an integrated solution (CADSTAR Power Integrity Advance with SI Verify and links from Constraint Manager) that enables concurrent AC/DC decoupling analysis, EMI prediction and virtual prototyping directly inside the CADSTAR environment. As a result, TEWS achieved faster, right‑the‑first‑time designs with rapid compliance to power‑integrity constraints (matching measurements to a 55 Ω target), designed PDNs on a minimal number of layers and significantly reduced the number of decoupling capacitors—lowering manufacturing costs and shortening development time.

TEWS

Michael Költzow

Senior CAD Engineer