Case Study: Xilinx achieves 20–30% faster simulations and shorter development cycles with Cadence Design Systems' Incisive Enterprise Simulator and Specman

Xilinx - Customer Case Study

Xilinx, a leading FPGA supplier that provides extensive soft and hard IP cores with many user-configurable parameters, faced a combinatorial testing challenge: verifying every meaningful combination of 20–30 parameters (each with multiple values) led to millions of permutations, long regression turnaround times, and unnecessary repeated simulation runs. The team needed a way to generate targeted parameter sets that respected legal values and inter-parameter dependencies, avoided repetition, and supported both full exhaustive and smaller nightly or feature-focused regressions.

Xilinx adopted Cadence Incisive Enterprise Simulator with Specman macros as a pre-simulation parameter-set generator, enabling layered constraints via the e language, explicit exhaustive generation where needed, and randomized generation with minimal repetition. The solution was easy to use, required no extra licenses, and has been integrated into Xilinx’s regression management tools—reducing simulation runtimes by 20–30%, shortening development cycles, and improving productivity and overall IP quality.

Xilinx

Meirav Nitzan

Verification Methodologist