Case Study: Texas Instruments achieves 300x faster mixed-signal verification with Cadence Design Systems' Digital/Mixed-Signal (DMS) solution

Texas Instruments - Customer Case Study

Texas Instruments needed to verify a new ultra low‑power MSP430 SoC that tightly integrates analog blocks (ADC/DAC) with digital logic and multiple power states. Because analog and digital interactions were critical and functional failures would cause costly re‑spins and missed market windows, TI required top‑level, metric‑driven mixed‑signal verification—but traditional transistor‑level mixed‑signal simulation was too slow and pure‑digital modeling lacked accuracy.

TI adopted Cadence’s digital‑centric mixed‑signal (DMS) flow, replacing analog blocks with real‑number (wreal) models, using Incisive Specman/Simulator, Virtuoso AMS Designer, and CPF for power states to enable randomized, coverage‑driven verification without the analog solver. The approach delivered equivalent accuracy at far higher speed (about 300× faster than transistor‑level simulation, with roughly 10× cycle‑time improvement), earlier error detection, fewer re‑spins, improved product quality and time to market, and strong vendor support.

Texas Instruments

Norbert Isaac

Verification Engineer