Case Study: Teradyne achieves faster time to market and higher-quality mixed-signal SoCs with Cadence Design Systems' Virtuoso Multi-Mode Simulation

Teradyne - Customer Case Study

Teradyne, a long-established leader in automatic test equipment, designs advanced systems built around complex custom chip sets. The company needed a single, flexible methodology with high-capacity simulation to verify complex analog/mixed-signal SoCs across diverse applications and shifting design priorities.

Cadence’s Virtuoso Multi-Mode Simulation (including Spectre, UltraSim and AMS Designer) gave Teradyne a consistent simulation platform and token-based licensing to switch seamlessly between engines and reuse models and testbenches. The result was a streamlined mixed-signal verification flow—faster design cycles, higher-quality silicon, reduced rework, and improved ROI, making Virtuoso the core of Teradyne’s major chip projects.

Teradyne

Dominic Wong

Engineering Tools Strategy Manager