Case Study: STMicroelectronics achieves 3–4 months faster development and mask-cost savings with Cadence Design Systems' Encounter Conformal ECO Designer

STMIcroelectronics - Customer Case Study

STMicroelectronics’ Automotive Products Group (APG) in Castelletto, Italy, designs mixed-signal, low‑power system-on-chips (SoCs) for major automotive customers. Facing frequently changing specifications, long qualification cycles (up to nine months) and tight delivery schedules, the team needed to automate register-transfer level (RTL) engineering change orders (ECOs) for pre- and post‑mask layouts so they could avoid base-layer re-spins and maximize first-silicon reuse.

APG adopted Cadence Encounter Conformal ECO Designer to automate ECO analysis and generation directly into place-and-route netlists, reducing manual iterations and providing early feasibility estimates. The tool enabled 90%‑complete RTL during layout, seamless post‑mask fixes and faster timing closure, delivering roughly 3–4 months saved on some designs, at least three weeks for post‑mask fixes, mask-cost savings equivalent to half a mask set per design, and up to 30% productivity gains for engineers.

STMIcroelectronics

Gianluigi Boarin

Design Manager, Automotive Products Group