Case Study: SiFive achieves faster timing closure and better PPA with Cadence Tempus ECO and Signoff

SiFive reduces turnaround time by 1.3X with Cadence Tempus

SiFive faced the challenge of achieving timing closure on large, complex SoC designs up to 130 million instances across advanced nodes like 7nm, while meeting aggressive schedules and managing power. They turned to Cadence and its Tempus Timing Signoff Solution to address these demanding timing ECO and signoff requirements.

Using the Cadence Tempus solution, integrated with the Innovus Implementation System, SiFive significantly streamlined their design flow. Cadence's solution enabled faster timing closure, reduced iterations, and delivered measurable results including approximately 8% leakage power recovery and a 1.3X reduction in project turnaround time, helping SiFive achieve better PPA more predictably.

SiFive

Parthasarathy Narasimhan

Sr. Director, Asic Design Engineering