Case Study: Ricoh achieves faster ASIC verification — saves 2.5 months and reduces missing test cases by ~22% with Cadence Design Systems' Incisive vManager

Ricoh - Customer Case Study

Ricoh, a leading provider of office and production printing systems, relies on multi-function ASICs to control its devices. To accelerate ASIC development it needed to reduce errors and speed verification: analyses showed 16% of design specs were incomplete, 8% of tests were omitted, and about 22% of errors stemmed from insufficient data extraction or misinterpreted specs. Engineers also spent roughly three hours per day collecting verification status from a 26-person team, delaying problem solving.

Ricoh implemented Cadence’s Incisive vManager (with vPlanner), Incisive Enterprise Simulator and the metric-driven verification (MDV) methodology to link design specifications to test environments and automate data collection and reporting. The changes cut the residual ~22% of spec-to-test issues, saved about 350 work hours (≈2.5 months) in reporting, improved reuse and change management, and enabled teams to begin resolving problems earlier in the design cycle.

Ricoh

Hiroyuki Shibaki

ASIC Design and Verification Manager