Case Study: QLogic achieves 50% faster ASIC verification and earlier system-level validation with Cadence Design Systems' Palladium XP

QLogic - Customer Case Study

QLogic, a leading provider of converged networking, enterprise Ethernet, and SAN switches, faced the challenge of rapidly delivering a complex multi‑million‑gate SoC to expand market share. The design required full system‑level verification of many ports simultaneously and earlier in the cycle to meet strict time‑to‑market and performance goals.

QLogic upgraded to the Cadence Palladium XP Verification Computing Platform, quickly migrating from Palladium II with strong customer support. Palladium XP’s capacity, higher performance and larger trace buffer enabled system‑level verification much earlier and faster, cutting verification time by about 50%, supporting a synthesizable testbench, and giving the company the scalability needed for future designs.

QLogic

Greg Kleese

Vice President, Network Solutions Group