Case Study: NVIDIA achieves a 25% shorter PCB layout design cycle with Cadence Design Systems' Allegro HDI-enabled PCB design flow

Nvidia - Customer Case Study

NVIDIA, the inventor of the GPU, needed to meet aggressive time-to-market windows (average design cycle under six months) while coping with product miniaturization and increasingly complex high-density interconnect (HDI) and high-speed constraints. Their existing Cadence tools plus in-house automation struggled with micro-via handling, layer-count reduction, and escalating constraint management, creating bottlenecks in PCB layout and risking schedule slippage.

NVIDIA adopted Cadence Allegro 16.2’s constraint-driven HDI flow, gaining automation for micro-via insertion, enhanced HDI rules, the Allegro Field Solver, and integrated constraint management—supported by close Cadence collaboration. The unified flow eliminated custom workarounds, improved predictability and signal integrity, and shortened PCB layout cycle time by up to 25%, boosting efficiency and time to productivity.

Nvidia

Greg Bodi

Senior Manager, System Design Senior Manager, System Design