Case Study: Nufront achieves 1,000x faster simulation and rapid RTL iteration with Cadence Design Systems' Palladium XP

Nufront - Customer Case Study

Nufront, a Chinese technology firm developing SoCs and multimedia solutions, needed to bring its third-generation NS115 mobile-computing chip to market while meeting strict mobile platform requirements for low power and high performance. The 12M‑gate design, built around a dual‑core ARM Cortex‑A9 and targeted for Android, required system‑level verification and power analysis that RTL simulation was too slow to provide and FPGA approaches lacked sufficient debug and iteration speed.

Nufront adopted the Cadence Palladium XP platform (with Incisive Enterprise Manager, SpeedBridge adapters, UXE compiler, and dynamic power analysis) to emulate the NS115, enabling early software validation and hybrid system verification. The result: roughly 1,000× faster simulation versus software, up to 1.3 MHz real‑time execution, 40‑minute synthesis on a single CPU, Android boots cut to about 2 hours (vs. a projected 83 days in RTL), rapid power‑peak identification and reduction, and much faster RTL turnarounds—significantly accelerating time to market and improving quality.

Nufront

Rock Yang

Vice President of Marketing