Case Study: Multigig (fabless semiconductor startup) achieves fast, accurate full‑chip mixed‑signal simulation and first‑time‑right silicon with Cadence Design Systems' Virtuoso simulation and verification suite

Multigig - Customer Case Study

Multigig is a California fabless startup that developed RotaryWave, a novel low-power, low-jitter clock technology that recycles charge and delivers picosecond timing resolution. Because RotaryWave uses looping differential transmission-line layouts and hundreds of phases per period, existing EDA flows could not model or verify its unusual high-frequency, low-amplitude mixed-signal behavior; Multigig needed extremely accurate low-phase-noise simulation and full-chip verification to avoid costly respins.

Cadence worked with Multigig to provide a block-to-full-chip flow using Virtuoso Spectre with the RF option, Virtuoso AMS Designer, and Virtuoso UltraSim, plus foundry PDK support and flexible token licensing. This collaboration and toolchain enabled early identification of limiting cases, fast, accurate RF block simulation and transistor-level full-chip verification, giving Multigig confidence in first-pass silicon and allowing engineers to concentrate on advancing the RotaryWave technology.

Multigig

Haris Basit

Chief Executive Officer