Case Study: TLi achieves first-pass silicon success and 6-month faster time-to-market with Synopsys DesignWare AEON FTP Trim NVM IP

TLi Achieves First-Pass Silicon Success with DesignWare AEON FTP Trim Non-Volatile Memory IP for Sensor ICs Targeting Smartphones

TLi, a veteran IC developer with 18+ years of experience, designed a compact sensor SoC for smartphones combining ambient light, proximity and accelerometer functions but faced tight cost, area and power targets and an aggressive schedule to reach volume production. They needed a high-quality non-volatile memory (NVM) IP that minimized integration risk and would accelerate time-to-market.

TLi adopted Synopsys’ DesignWare AEON FTP Trim NVM IP, integrating the hard GDSII block in two weeks to enable trimming for improved sensitivity and yield. The IP’s small footprint, low power, integrated charge pump and single-supply operation helped TLi achieve first-pass silicon success, shave roughly six months off product time-to-market and realize up to 10% cost savings with a zero-mask adder NVM solution.

TLi

Sangyun Han

Engineering Director