Case Study: Skyviia cuts time-to-silicon by 3 months and reduces integration risk with Synopsys HAPS FPGA-based prototyping system

Skyviia Reduces Risk and Speeds Multimedia SoC Development Time with Synopsys’ HAPS FPGA-Based Prototyping System

Skyviia, a multimedia IC design company, developed a single-chip SoC for set-top boxes featuring a dual-core ARM Cortex‑A9, audio/video DSPs, encoders/decoders and multiple high-speed interfaces. Their key challenges were to speed time-to-market by accelerating hardware IP development and validation, reduce hardware–software integration risk, and meet tight DDR3 timing constraints.

Skyviia adopted Synopsys’ HAPS‑62 FPGA-based prototyping system with a high-speed DDR3 daughter board and DesignWare IP, using the HAPS reference design and GUI for fast bring-up and real-world interface validation. The integrated solution let them run the design at near real-time speeds, meet DDR3‑800 timing, reduce integration risk, and accelerate time to silicon by three months while delivering high-quality results.

Skyviia

Yiyung Jeng

Senior Director of R&D