Case Study: PLX Technology achieves first-to-market PCIe Gen 3 switch and first-pass silicon success with Synopsys DesignWare Embedded Memory IP

PLX First to Market with PCI Express Gen 3 Switch using DesignWare Embedded Memory IP

PLX Technology, a leader in PCI Express switches and high-performance system-interconnect silicon, needed to deliver a new PCIe Gen 3 switch on an aggressive schedule while meeting strict requirements for high performance, low power, and minimal area on an advanced node. A large portion of the 30M-gate SoC was SRAM, so PLX also required embedded memory IP with integrated test and repair to ensure manufacturability and yield.

PLX selected Synopsys’ DesignWare 40 nm embedded memory compilers and the STAR Memory System for integrated test and repair. The silicon-proven IP, advanced power-management options, and responsive Synopsys support enabled first-pass silicon success, met the first-to-market goal, reduced area and power, and improved manufacturing yield and time-to-manufacturing.

PLX Technology

Syed Ahmed

Senior Director of Physical Design