Case Study: Peking University achieves rapid, high-performance HDTV 1080P encoder prototyping with Synopsys HAPS FPGA solution

NELVT Utilizes Complete Hardware + Software HAPS FPGA-Based Prototyping Solution for HDTV 1080P Encoder Design

The National Engineering Laboratory for Video Technology (NELVT) at Peking University, led by Dr. Huizhu Jia, needed to implement and verify an AVS HDTV 1080p real‑time encoder prototype targeted at 65nm while reducing prototype bring‑up time and accelerating software development to cut cost and schedule risk.

NELVT used Synopsys’ integrated HAPS FPGA‑based prototyping systems (HAPS‑52, HAPS‑61, HAPS‑62) with Synplify Pro Certify multi‑FPGA partitioning and Identify RTL debugging, enabling a fast, smooth ASIC‑to‑FPGA migration. The team validated functionality and performance ahead of schedule, benefited from high system performance and visibility, and reported time and cost savings backed by strong Synopsys technical support.

Peking University

Huizhu Jia

SoC Team Leader