Case Study: Global Unichip Corporation achieves aggressive time-to-market for multiple mobile multimedia SoCs with Synopsys DesignWare IP

GUC Meets Aggressive Time-to-Market Deadlines for Multiple Mobile Multimedia SoCs using DesignWare IP

Global Unichip (GUC), a Taiwan-based flexible ASIC services company, was tasked with developing multiple 65 nm and 40 nm SoCs for smartphone and mobile multimedia customers under an aggressive nine-month time-to-market schedule. To meet tight size, power and integration constraints, GUC needed silicon-proven USB, PCI Express and mobile storage IP and wanted to minimize integration risk on these complex designs.

GUC selected Synopsys DesignWare IP — including USB 2.0 OTG and nanoPHY, PCIe 1.1 PHY, and a Mobile Storage host controller — and used Synopsys’ tunable PHYs, built-in diagnostics and ATE vectors plus online training and support. The result was on-schedule delivery of multiple customer SoCs that met low-power and small-area requirements, reduced integration risk, and enabled repeatable, production-ready testing.

Global Unichip Corporation

Nick Tsai

Senior Director of Design Service Division