Case Study: Movidius achieves first-pass silicon success for Myriad 2 VPU with Synopsys DesignWare IP

First-Pass Silicon Success for Myriad 2 Vision Processing Unit with DesignWare USB 3.0, LPDDR3/2 & MIPI D-PHY IP

Movidius, a developer of compact, high‑performance low‑power vision processors, needed to deliver its Myriad 2 VPU — a complex 28nm SoC for mobile, wearable and camera applications — on a tight timeline while meeting aggressive area, power and performance targets and filling gaps in its IP portfolio.

Movidius selected Synopsys DesignWare IP (including MIPI D‑PHY, USB 3.0 PHY and controller, Gen2 DDR multiPHY/uMCTL2, memory compilers and logic libraries) and leveraged Synopsys services. The integrated solution reduced integration risk, enabled first‑pass silicon success, achieved the required power/performance/area tradeoffs, accelerated time‑to‑market, and set the stage for continued collaboration on next‑generation designs.

Movidius

Sean Mitchell

Chief Operating Officer