Case Study: Fairchild Semiconductor achieves first-pass silicon success and on-time USB 2.0 transceiver launch with Synopsys' DesignWare USB 2.0 nanoPHY IP

Fairchild Achieves First-Pass Silicon Success and Meets Project Schedule for Next-Generation USB 2.0 Transceiver SoC

Fairchild Semiconductor, a supplier of power- and mobile-focused semiconductor solutions, needed to deliver a complex 130-nm USB 2.0 OTG transceiver (FUSB2500) designed into a major handset and meet a critical 14‑month schedule. The key challenges were achieving first‑pass silicon success, meeting tight time‑to‑market constraints, and integrating third‑party USB 2.0 IP with Fairchild’s existing IP.

Fairchild selected Synopsys DesignWare USB 2.0 nanoPHY IP for its low power/area, ULPI interface, auto‑detect and post‑silicon tunability, and benefited from strong documentation and responsive support. The team integrated the PHY in weeks, achieved right‑first‑time silicon, met the project schedule, entered the high‑end handset market with a lower‑power solution, and expects to produce millions of units while continuing to use the DesignWare IP.

Fairchild Semiconductor

Jerry Johnston

Senior Director of Switch and Interface