Case Study: Emulex achieves faster verification productivity and low-power 40nm ASIC design with Synopsys

Emulex Enhances Design Productivity With Synopsys’ Advanced Verification Solutions

Emulex, a leader in converged networking solutions for data centers, needed to accelerate delivery of next-generation 40nm ASICs while tackling verification productivity, low‑power design, and smoother handoffs to fabs. Supporting the industry standard SystemVerilog was also critical to meet rising performance and development demands.

Emulex standardized on Synopsys’ verification flows and low‑power solutions—including strong SystemVerilog support and tools like Design Compiler and PrimeTime—boosting verification productivity, enabling early power-management implementation, and simplifying manufacturing correlation. The result was a more predictable, high‑quality fab handoff, greater manufacturing flexibility, faster product introductions, and a strengthened long‑term EDA partnership.

Emulex

Peter Paterson

Senior Vice President of Engineering