Case Study: CSR cuts nearly 3 months from imaging SoC development and accelerates time-to-market with Synopsys ZeBu

CSR - Customer Case Study

CSR’s imaging division designs complex system-on-chips (SoCs) for printers and scanners that combine multiple ARM processors, proprietary DSP cores, DDR and peripheral interfaces, and embed an interpreter that translates PostScript commands into image-processing actions. Because full image-processing validation was impossible with HDL simulators, CSR previously waited for first silicon to integrate hardware and software—an approach that once exposed a costly post‑silicon bug and threatened long delays for both CSR and its customers.

To avoid repeat problems CSR adopted the ZeBu Server‑1 hardware‑assisted verification platform for system‑level emulation. ZeBu’s fast execution (3–4 MHz), automatic compilation and FPGA partitioning let CSR run their interpreter on RTL pre‑silicon and process tens of thousands of real images, uncovering deep bugs earlier. Customers can use the same emulation setup for early software testing, which together shortened development cycles (about three months saved), reduced post‑silicon fixes and accelerated time‑to‑market.

CSR

Mark Busa

Director of ASIC Engineering for the Imaging Group