Case Study: Chipus Microelectronics achieves first-pass silicon success and a 7-month time-to-market acceleration with Synopsys DesignWare AEON MTP NVM IP

Chipus Achieves First-Pass Silicon Success for UHF RFID Design with Synopsys DesignWare AEON MTP NVM IP

Chipus Microelectronics, an analog IP design house focused on ultra-low-power data converters, analog front-ends and power management, faced an aggressive customer schedule to deliver a passive UHF RFID design. They needed to meet extremely tight power-consumption targets, integrate reliable non-volatile memory, and minimize development cost and schedule risk to achieve first-pass silicon success.

Chipus selected Synopsys DesignWare AEON MTP NVM IP — silicon-proven and available on their target 180‑nm process — and integrated it with Synopsys’ documentation and technical support in three weeks. The project achieved first-pass silicon success, accelerated time-to-market by about seven months, reduced integration risk, and saved up to 15% in development costs while meeting the design’s low-power goals.

Chipus Microelectronics

Murilo Pessatti

Chief Executive Officer