Case Study: CEVA achieves fast, optimized MM3000 multicore DSP design with Synopsys Processor Designer

CEVA’s MM3000 Mobile Multimedia Platform Successfully Used Processor Designer for 2 Advanced DSP Designs

CEVA, a leading licensor of silicon IP for mobile and consumer electronics, developed the MM3000 — a heterogeneous, multicore HD video and image-processing DSP platform composed of Stream and Vector processors. The team needed to meet a tight market window while preserving design flexibility for an innovative multicore architecture, shorten cycle time, optimize performance/area tradeoffs, and create an integrated tool flow to speed many iterations.

Using Synopsys Processor Designer, CEVA automatically generated optimized RTL and key software tools (debugger, assembler, linker) from a high-level LISA description, enabling fast FPGA and ASIC implementation and quick design iterations. The result was a scalable, configurable platform that achieved real-time AVC/MVC HD streaming on FPGAs, improved performance and area optimization, and a shorter time-to-market supported by Synopsys’ global R&D and field teams.

CEVA

Erez Bar-Niv

Chief Technology Officer