Case Study: Cisco achieves enhanced ASIC observability and reliability with Synopsys Silicon Lifecycle Management (SLM) IPs

Cisco Enhances ASIC Observability and Reliability with Synopsys Silicon Lifecycle Management (SLM) IPs

Cisco relied on its Silicon One ASICs to deliver next-generation networking performance but faced growing challenges from higher transistor densities: temperature and voltage fluctuations, on‑chip process variation, and timing degradation threatened long‑term reliability and optimal power/performance. Ensuring continuous, fine‑grained monitoring of these factors across operational lifetimes was essential to meet performance and dependability targets.

Cisco integrated Synopsys Silicon Lifecycle Management (SLM) IPs—including PVT sensors and controller (PVTC, PD, VM, DTS2, TD), Path Margin Monitor (PMM), and Clock Delay Monitor (CDM)—to provide real‑time, actionable observability. The deployment improved dynamic power/performance management, extended ASIC longevity by tracking aging and critical path margins, enabled data‑driven design optimizations, and offered scalable, application‑specific sensor placement to meet diverse operational needs.

Cisco