Case Study: imec achieves automated microbump probing feasibility with National Instruments STS

Probing of Large-Array, Fine-Pitch Microbumps for 3D ICs

imec, a world-leading R&D center for nano-electronics, faced the challenge of testing 3D stacked IC dies prior to assembly. Engineers had long considered it impossible to electrically probe the dies' dense interconnect microbumps, which feature arrays of over 1,000 bumps with pitches of 40 µm or smaller, because conventional probe technology was not suitable. They needed a solution to achieve pre-bond test access to ensure high compound stack yields.

National Instruments provided the solution with its Semiconductor Test System (STS) and PXI instruments. The system utilized a hard-docking test head with PXIe switch matrix modules to manage the over 1,200 required connections and perform rapid resistance measurements. The results proved that microbump probing was both technically and economically feasible, with excellent electrical contact and probe marks that did not impact final product yield. National Instruments' technology enabled imec to routinely check its test chips and share these groundbreaking insights with its partners.

imec

Ferenc Fodor

imec