Case Study: Leonardo DRS achieves microsecond-scale FPGA HIL testing and cuts design iterations from days to hours with MathWorks

Leonardo DRS Performs FPGA-Based Hardware-in-the-Loop Testing of Shipboard Power Electronics Systems

Leonardo DRS needed to perform high‑fidelity, microsecond‑scale hardware‑in‑the‑loop (HIL) testing of large shipboard power‑electronics systems but lacked ready access to full‑scale hardware and could not achieve the necessary sampling rates with CPU‑based HIL or lengthy hand‑coded HDL. To address this, Leonardo DRS adopted MathWorks software — MATLAB, Simulink, Simscape Electrical, Simulink Real‑Time, and HDL Coder — alongside Speedgoat real‑time target hardware to model plants and deploy them to an FPGA for realistic HIL testing.

Using MathWorks’ model‑based workflow, Leonardo DRS translates Simulink/Simscape plant models into HDL for FPGA deployment with Simulink Real‑Time and HDL Coder, enabling microsecond (and down to 50‑ns with fidelity tradeoffs) HIL simulations on Speedgoat hardware without manual HDL coding. The MathWorks solution cut design iterations from days to hours, replaced multimillion‑dollar physical testbeds (saving cost, time, and lab space), and let teams reuse trusted simulation models for routine HIL testing and fault replication.

Leonardo DRS

Henry Brengel

Software Engineer