Case Study: Sarcina Technology LLC achieves right‑first‑time IC package designs and cost savings with Keysight PathWave ADS

Sarcina Delivers Right-FirstTime Packages Using ADS for Chip-Package-Board Simulation

Sarcina Technology LLC, a Palo Alto/Taipei semiconductor package design service, needed to deliver right‑first‑time packages for dense, high‑power ASICs with chip‑package‑board signal integrity well above 100 Gbps. Traditional SPICE‑based flows were slow, script‑heavy and suffered convergence issues, so Sarcina adopted Keysight’s PathWave Advanced Design System (ADS) along with SI/PI Pro, PathWave Memory Designer and IBIS‑AMI model integration to get accurate, fast end‑to‑end SI/PI simulation with a usable GUI.

Using Keysight ADS as the backbone, Sarcina combines 3D EM S‑parameter extraction, IBIS‑AMI models and time‑domain PRBS/PAM4 simulations to analyze full channels from die to connector, enabling overnight results and easy model integration. The Keysight solution produced simulations that closely matched lab measurements, supported first‑time success for DDR/LPDDR and PAM4 designs (including DDR6 and high‑GbE PAM4 cases), achieved a 100% package tape‑out success rate, and delivered significant cost savings—avoiding the $1–2M cost of a full in‑house packaging team and saving hundreds of thousands per advanced package.

Sarcina Technology LLC

Larry Zu

Chief Executive Officer